Sinrace Power Supply Technology (Shenzhen) Co., Ltd.

1 Introduction

Communication with the DC / DC power module power levels typically from a few watts to tens watts, the output voltage from few volts to hundreds volts, for the tens watts of power, generally low-voltage high-current-based, there 5V/10A, 5V/6A , 3.3V/8A such specifications, generally about 80% efficiency (depending on the size of the output voltage). Power requirements for the module MTBF (mean time between failure) one million hours or more, so try to avoid using electrolytic capacitors, it is best to use ceramic capacitors. Ceramic capacitance is small, with very good high frequency characteristics. In addition, DC / DC module power requirements is less than the thickness of 12.7mm, so the high requirements of the transformer, the core must have a flat shape and the high frequencies with a small loss factor.

2 Principle of forward circuit

2.1 General Forward

Figure 1 shows a single-ended forward circuit, as if it's Buck Converter with Transformer. Output voltage UO by the N2/N1, the duty cycle D and the input voltage to determine that the UO = (N2/N1) • D • Ui.

When the PWM controller output positive pulse, the power switch turns on, the transformer primary winding flows through the current, this current consists of two parts: The first part is magnetizing current, which flows through the equivalent open-loop inductor current; the second part is the equivalent primary current output current, it turns ratio is inversely proportional to the initial level, and output current proportional. The energy stored in the inductor in the power switch turns off to the next release let go before the opening so that the magnetic flux reset. N3 is the demagnetization winding, generally N3 = N1. If the design of a 36V to 72V DC input, 5V/6A output power modules, when the demagnetization winding and primary winding turns ratio is 1, Udsr = 72V +72 V = 144V. Selected for the anti-peak Uds the IRF630 MOSFET 200V, 50V only the margin to withstand an exception, and superimposed on this voltage spikes. FET Rds (on) and allow the Udsr inversely proportional to, such as IRF630's Rds (on) is 0.4Ω, and the same pressure as the 100V series IRF530N is 0.11Ω. Obviously, the input of a wide range selection of high-voltage power supply design of the FET (maximum input DC voltage Uimax × 2 used) is only a little less to deal with high-enter the economy. This paper introduces a modified circuit to overcome this drawback.

2.2 Improved Forward

When the transformer parameters and external operating frequency of the following conditions:

(1) The switching frequency is high enough;

(2) The magnetizing current is small enough;

(3) The leakage inductance is small enough. It is no longer need to go to the magnetic winding, added to the FET on anti-peak voltage is not proportional to the input voltage, but the design and the minimum input voltage added to the anti-peak MOSFET voltage is almost identical. When (2) and (3) have adequate hours, stored in these components on the emotional energy is limited, the ratio of inductance and distributed capacitance is not big, the same as the equivalent characteristic impedance is not big. Ld and Cd resonance occurs, as long as the equivalent resonant Frequency less than the switching frequency, in the T-off section, Uds voltage DC power supply at both ends (Ui) superimposed on the equivalent energy storage (in Lm and leakage) into the distributed capacitance (Cd). The value of energy is depended on the capacity of capacitor, voltage between the capacitor and the conversion time. When the input voltage rises, ieq decreases, and vice versa increased; so Ud almost unchanged. Ud and output load only, whereas the input voltage rise / fall is not sensitive. So that it is no need the select the Mos-fet according the highest input voltage for the wide input voltage range.